1. Field of the Invention
The present invention relates to a display device including a circuit formed using a transistor. In particular, the present invention relates to a display device using an electrooptical element such as a liquid crystal element, a light-emitting element, or the like, and an operation method thereof.
2. Description of the Related Art
In recent years, with the increase of large display devices such as liquid crystal televisions, display devices have been actively developed. In particular, a technique for forming a pixel circuit and a driver circuit including a shift register and the like (hereinafter also referred to as an internal circuit) over the same insulating substrate by using transistors formed of a non-crystalline semiconductor (hereinafter also referred to as amorphous silicon) has been actively developed because the technique greatly contributes to reduction in power consumption and cost. The internal circuit formed over the insulating substrate is connected to a controller IC or the like (hereinafter also referred to as an external circuit) through an FPC (Flexible Printed Circuit) or the like, and its operation is controlled.
Among the aforementioned internal circuits, a shift register using transistors formed of a non-crystalline semiconductor (hereinafter also referred to as amorphous silicon transistors) has been devised. FIG. 100A shows a structure of a flip-flop included in a conventional shift register (Reference 1: Japanese Published Patent Application No. 2004157508). The flip-flop in FIG. 100A includes a transistor 11 (a bootstrap transistor), a transistor 12, a transistor 13, a transistor 14, a transistor 15, a transistor 16, and a transistor 17, and is connected to a signal line 21, a signal line 22, a wiring 23, a signal line 24, a power supply line 25, and a power supply line 26. A start signal, a reset signal, a clock signal, a power supply potential VDD, and a power supply potential VSS are input to the signal line 21, the signal line 22, the signal line 24, the power supply line 25, and the power supply line 26, respectively. An operation period of the flip-flop in FIG. 100A is divided into a set period, a selection period, a reset period, and a non-selection period as shown in a timing chart in FIG. 100B.
In the set period, an H-level signal is input from the signal line 21 and a potential of a node 41 is increased to VDD−Vth15 (Vth15: a threshold voltage of the transistor 15), so that the node 41 is in a floating state while the transistor 11 is kept on. The transistor 16 is in an on state when an H-level signal is input from the signal line 21; and the transistor 16 is turned off when the transistor 14, a gate electrode of which is connected to the node 41, is turned on and a potential of a node 42 is at L level. That is, a charge is leaked from a gate electrode of the transistor 11 during a period from the time when an H-level signal is input from the signal line 21 until the transistor 16 is turned off.
Here, a signal with a potential of VDD is referred to as an H-level signal, and a signal a potential of which is VSS is referred to as an L-level signal. L level refers to a state where a potential of the L-level signal is VSS.
In display devices in References 2 and 3, a shift register formed of amorphous silicon transistors is used for a scan line driver circuit, and video signals are input to sub-pixels of R, Q and B from one signal line, so that the number of signal lines is decreased to one third. Thus, in the display devices in References 2 and 3, the number of connections between a display panel and a driver IC is reduced (Reference 2: Jin Young Choi, et al., “A Compact and Cost-efficient TFT-LCD through the Triple-Gate Pixel Structure”, SOCIETY FOR INFORMATION DISPLAY 2006 INTERNATIONAL SYMPOSIUM DIGEST OF TECHNICAL PAPERS, Volume XXXVII, pp. 274-276; and Reference 3: Yong Soon Lee, et al., “Advanced TFT-LCD Data Line Reduction Method”, SOCIETY FOR INFORMATION DISPLAY 2006 INTERNATIONAL SYMPOSIUM DIGEST OF TECHNICAL PAPERS, Volume XXXVII, pp. 1083-1086).